TFE01: Low power digital design
# Introduction
## Disclaimer
This compendium is a work in progress and needs review and possibly restructuring and citations. The current structure is based on the ordering and naming of lectures from the 2017 semester.
## Specialization course
This subject is part of the [Design of Digital Systems, Specialization Course (TFE4525)](https://www.wikipendium.no/TFE4525_Design_of_Digital_Systems_Specialization_Course).
# Fundamentals
## Power dissipation
Power dissipation in CMOS circuits are typically divided into three components, namely _static power_, _dynamic power_ and _short-circuit power_.
### Static power dissipation
Mostly the power dissipated through leakage currents.
$$ P_s = V_{DD} \times I_D, $$
where $V_{DD}$ is the supply voltage and $I_D$ is the leakage current.
### Dynamic power dissipation
Power from switching logic by charging and discharging in capacitors.
$$ P_d = \alpha f_{CLK} C_L V_{DD}^2, $$
where $\alpha$ is the activity factor, $f_{CLK}$ is the clock frequency, $C_L$ is the swithing load capacitance, and $V_{DD}$ is the supply voltage.
### Short-circuit power dissipation
Caused by transients in switching in the window when p-channel and n-channel of eg. and inverter connects the supply voltage to ground.
This power is arguably related to the activity factor of the circuit and hence a part of the dynamic power dissipation.
## Delay, power and energy
# Ultra low voltage and low power circuit design techniques
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# Razor flip-flops
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# HDL techniques for low power design
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# Brain-inspired chips for large data sets
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# Ultra-low power wireless microcontroller design
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# Energy scavenging
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# Low power FPGAs
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# Moore's law and technology scaling
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# Cloud computing
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