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TFE01: Low power digital design

# Introduction ## Disclaimer This compendium is a work in progress and needs review and possibly restructuring and citations. The current structure is based on the ordering and naming of lectures from the 2017 semester. ## Specialization course This subject is part of the [Design of Digital Systems, Specialization Course (TFE4525)](https://www.wikipendium.no/TFE4525_Design_of_Digital_Systems_Specialization_Course). # Fundamentals

## Power dissipation Power dissipation in CMOS circuits are typically divided into three components, namely _static power_, _dynamic power_ and _short-circuit power_. ### Static power dissipation Mostly the power dissipated through leakage currents. $$ P_s = V_{DD} \times I_D, $$ where $V_{DD}$ is the supply voltage and $I_D$ is the leakage current. ### Dynamic power dissipation Power from switching logic resulting from the charging and discharging in capacitors. $$ P_d = \alpha f_{CLK} C_L V_{DD}^2, $$ where $\alpha$ is the activity factor, $f_{CLK}$ is the clock frequency, $C_L$ is the load capacitance, and $V_{DD}$ is the supply voltage.

# Ultra low voltage and low power circuit design techniques ... # Razor flip-flops ... # HDL techniques for low power design ... # Brain-inspired chips for large data sets ... # Ultra-low power wireless microcontroller design ... # Energy scavenging ... # Low power FPGAs ... # Moore's law and technology scaling ... # Cloud computing ...