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This is an old version of the compendium, written Dec. 2, 2016, 9:01 p.m. Changes made in this revision were made by andervat. View rendered version.
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TTK4155: Embedded and Industrial Computer Systems Design

$$ \newcommand{\dt}{\,\mathrm{d}t} \newcommand{\dx}{\,\mathrm{d}x} \newcommand{\dy}{\,\mathrm{d}y} \newcommand{\dh}{\,\mathrm{d}h} \newcommand{\pt}{\partial t} \newcommand{\px}{\partial x} \newcommand{\py}{\partial y} \newcommand{\QEDA}{\hfill\ensuremath{\blacksquare}} \newcommand{\QEDB}{\hfill\ensuremath{\square}} \newcommand{\R}{\mathbb{R}} \newcommand{\Q}{\mathbb{Q}} \newcommand{\bmat}[1]{\begin{bmatrix}#1\end{bmatrix}} \renewcommand{\vec}[1]{\mathbf{#1}} $$ # Embedded computer systems ### What is an embedded computer system? An embedded computer is generally a part of a larger system, where the computer itself is not the main purpose. It is designed to to a specific tast, and is optimized to do so. The computer is programmable, but is not a general purpose computer like a PC, tablet or workstation. ### Peripherals #### What is a peripheral? A peripheral is some sort of device or computer hardware used to: - Send data from the user to the computer - Typically a computer mouse, buttons, touchpad, keyboard, webcam, scanner etc. - Send data from the computer to the user - Monitors, printers, speakers etc. - Both of the above - Touchscreens - Store data # Power supply # Processors and architectures ## Microcontrollers #### Interrupts #### Polling ## Processor design #### RISC - Reduced instruction set computing
RISC is a CPU design based on a very simple instruction set. The instructions are optimized for specific tasks, and is made so that each task of the instruction only takes one clock cycle for the processor to complete. Generally like this: 1. Fetch 2. Decode 3. Execute 4. Memory access 5. Writeback We see that the CPI (Cycles per instruction)The register set of a typical RISC-processor is processor is generally very large, because of the simplicity of each instruction.Generally like this: 1. Fetch 2. Decode 3. Execute 4. Memory access 5. TWriteback We see that the CPI (Cycles per instruction) of this sequence is 5, but this may of course be reduced down to 1 by pipelining(//Add ref//), and further reduced by adding additional execution-units. We generally see RISC preocessors have an CPI of 1-2.
RISC processors are very energy efficient and are therefore very popular in mobile devices. The downside of RISC processors is that they require a lot of coding by the programmer. Precise code may however lead to less complicated electrical components, and we may say that the RISC processor is software oriented (at least more software oriented than CISC).
#### CISC - Complex instruction set computingCISC is looked upon as the "opposing" architecture to RISK. They have a very small instruction set compared to RISC, but thier instuctions are able to do a lot more. They are very popular due to their simplicity: one does not have to "Hard-code" everything. Due to this they are very much used in personal computers and workstations.
### Memory ### Memory access ### Address decoding ### Memory-mapped I/O # Communications ## Serial communication ## Network ## Wireless communication # Analog-Digital interfaces
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